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NTE2764 Integrated Circuit
NMOS, 64K Erasable EPROM, 200ns
Description: The NTE2764 is a 65,536-bit (8192 X 8 bit) Ultraviolet Erasable and Electrically Programmable Read-Only Memory (EPROM) in a 28-Lead DIP type package which operates from a single +5V supply, making it ideal for microprocessor applications. It features an output enable control and offers a standby mode with an attendant 67% savings in power consumption. A distinctive feature of the NTE2764 is a separate output control, output enable (OE) from the chip enable control (CE). The OE control eliminates bus contention in multiple-bus microprocessor systems. The NTE2764 features fast, simple one-pulse programming controlled by TTL-level signals. Total programming time for all 65,536 bits is 420 seconds. Features: D Ultraviolet Erasable and Electrically Programmable D Access Time: 250ns Max D Single Location Programming D Programmable with Single Pulse D Low Power Dissipation: 150mA Max (Active Current) 50mA Max (Standby Current) D Input/Output TTL Compatible for Reading and Programming D Single +5V Power Supply D Three-State Outputs Absolute Maximum Ratings: (TA = +25C, Note 1 unless otherwise specified) Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6 to +6V Supply Voltage, VPP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6 to +22V Output Voltage, VOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6 to +6V Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6 to +6V Operating Temperature Range, Topr . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -10C to +80C Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to +125C Note 1. Exposing the device to stresses above those listed in Absolute Maximum Ratings could cause permanent damage. The device is not meant to be operated under conditions outside the limits described in the operational sections of this specification. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC Electrical Characteristics: (VCC = +5V 5% unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit Read Mode and Standby Mode (TA = 0 to +70C) Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Output Leakage Current Input Leakage Current VCC Current Standby Active VOH VOL VIH VIL ILO ILI ICC1 ICC2 VIH VIL ILI VOH VOL ICC IPP CE = VIL, PGM = VIL VIN = VIL or VIN IOH = -400A IOL = 2.1mA VOUT = 5.25V VIN = 5.25V CE = VIH OE = CE = VIL IOH = -400A IOL = 2.1mA 2.4 - 2.0 -0.1 - - - - - - - - - - - - - 0.45 VCC +1 +0.8 10 10 50 150 V V V V A A mA mA
Program, Program Verify, and Program Inhibit Mode (TA = +25 5C, VPP = +21V 0.5V) Input High Voltage Input Low Voltage Input Leakage Current Output High Voltage Output Low Voltage VCC Current VPP Current 2.0 -0.1 - 2.4 - - - - - - - - - - VCC +1 +0.8 10 - 0.45 150 30 V V A V V mA mA
AC Electrical Characteristics: (VCC = +5V 5% unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit Read Mode and Standby Mode (TA = 0 to +70C, Note 2) Address to Output Delay CE to Output Delay Output Enable to Output Delay Output Enable High to Output Float Address to Output Hold tACC tCE tOE tDF tOH tAS tOES CE = OE = VIL OE = VIL CE = VIL CE = VIL CE = OE = VIL - - 10 0 0 - - - - - 250 250 100 90 - ns ns ns ns ns s s
Read Mode and Standby Mode (TA = +25C 5C, VPP = +21V 5V, Note 3) Address Setup Time OE Setup Time 2 2 - - - -
Note 2. Test Conditions: Output Load: 1 TTL gate and CL = 100pF Input Rise and fall Times: 20ns Input Pulse Levels: 0.8V to 2.2V Timing Measurement Reference Level: Inputs: 1.0V and 2.0V Outputs: 0.8V and 2.0V Note 3. Test Conditions: Input Pulse Levels: 0.8V to 2.2V Input Timing Reference Level: 1.0V and 2.0V Output Timing Reference Level: 0.8V and 2.0V Input Rise and fall Times: 20ns
AC Electrical Characteristics (Cont'd): (VCC = +5V 5% unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit s s s s ns ns ms s Read Mode and Standby Mode (Cont'd) (TA = +25C 5C, VPP = +21V 5V, Note 3) Data Setup Time Address Hold Time CE Setup Time Data Hold Time Chip Enable to Output Float Delay Data Valid from OE Program Pulse Width VPP Setup Time tDS tAH tCES tDH tDF tOE tPW tVS 2 0 2 2 0 - 45 2 - - - - - - - - - 130 150 55 -
-
50 -
Note 3. Test Conditions: Input Pulse Levels: 0.8V to 2.2V Input Timing Reference Level: 1.0V and 2.0V Output Timing Reference Level: 0.8V and 2.0V Input Rise and fall Times: 20ns Capacitance: (TA = +25C, f = 1MHz unless otherwise specified)
Parameter Input Capacitance Output Capacitance Symbol CIN COUT VIN = 0V VOUT = 0V Test Conditions Min - - Typ - - Max 6 12 Unit pF pF
Mode Selection: (Note 4)
Mode Read Stanby Program Program Verify Program Inhibit CE VIL VIH VIL VIL VIH OE VIL X X VIL X PGM VIH X VIL VIH X VPP VCC VCC VPP VPP VPP VCC VCC VCC VCC VCC VCC O0 - O7 DOUT High Z DIN DOUT High Z
Note 4. X can be either VIL or VIH. Function: The NTE2764 operates from a single +5V power supply, making it ideal for microprocessor applications. Programming of the NTE2764 is achieved with a single 50ms TTL pulse. Total programming time for all 65,536 bits is 420 sec. Due to the simplicity of the programming requirements, devices on boards and in systems may be easily programmed without any special programmer. The NTE2764 features a standby mode which reduces the power dissipation from a maximum active power dissipation of 788mW to a maximum standby power dissipation of 262mW. This results in a 67% savings with no increase in access time. Erasure of the NTE2764 programmed data can be attained when exposed to light with wavelengths shorter than approximately 4,000 Angstroms. It should be noted that constant exposure to direct sunlight or room level fluorescent lighting could erase the NTE2764. Consequently, if the NTE2764 is to be exposed to these types of lighting conditions for long periods of time, its window should be masked to prevent unintentional erasure.
Function (Cont'd): The recommended erasure procedure for the NTE2764 is exposure to ultraviolet light with wavelengths of 2,537 Angstroms. The integrated dose (i.e. UV intensity x exposure time) for erasure should be not less than 15W-sec/cm2. The erasure time is approximately 15 to 20 minutes using an ultraviolet lamp of 12,000 W/cm2 power rating. During erasure, the NTE2764 should be placed within 1 inch of the lamp tubes. If the lamps have filters on the tubes, the filters should be removed before erasure. Operation: The five operation modes of the NTE2764 are listed in the Mode Selection table. In READ mode, the only power supply required is a +5V supply. During programming, all inputs are TTL levels except for VPP which is pulsed from TTL level to 21V. Read Mode: When CE and OE are at low (0) level, READ is set and data is available at the outputs after tOE from the falling edge of OE and tACC after setting the address. Standby Mode: The NTE2764 is placed in standby mode with the application of a high (1) level TTL signal to the CE input. In this mode, the outputs are in a high impedance state, independent of the OE input. The active power dissipation is reduced by 67% from 788mW to 262mW. Programming: Programming begins with erasing all data and consequently having all bits in the high (1) level state. Data is then entered by programming a low (0) level TTL signal into the chosen bit location. The NTE2764 is placed in programming mode by applying a low (0) level TTL signal to the CE and PGM with Vpp at +21V. The data to be programmed is applied to the output pins in 8-bit parallel form at TTL levels. Any location can be programmed at any time, either individually, sequentially or at random. When multiple NTE2764s are connected in parallel except for CE, individual NTE2764 can be programmed by applying a low (0) level TTL pulse to the PGM input of the desired NTE2764 to be programmed. Programming of multiple NTE2764s in parallel with the same data is easily accomplished. All the like inputs are tied together and programmed by applying a low (0) level TTL pulse to the PGM inputs. Programming Inhibit Mode: Programming multiple NTE2764 in parallel with different data is easier with the program inhibit mode. Except for CE (or PGM) all like inputs (including OE) of the parallel NTE2764 may be common. Programming is accomplished by applying a low (0) TTL-level program pulse to the CE (or PGM) input with VPP at +21V. A high (1) level applied to the CE (or PGM) of the other NTE2764 will inhibit it from being programmed. Program Verify Mode: A verify should be performed on the programmed bits to determine that the data was correctly programmed. The program verify can be performed with CE and OE at low (0) levels and PGM at high (1) level.
Output Deselect: The data outputs of two or more NTE2764s may be wire-ORed together to the same data bus. In order to prevent bus contention problems between devices, all but the selected NTE2764s should be deselected by raising the CE input to a TTL high. OE input should be made common to all devices and connected to the READ line from the system control BUS. These connections offer the lowest average power consumption.
Pin Connection Diagram VPP 1 A12 2 A7 3 A6 4 A5 5 A4 6 A3 7 A2 8 A1 9 A0 10 O0 11 O1 12 O2 13 GND 14 28 VCC 27 PGM 26 N.C. 25 A8 24 A9 23 A11 22 OE 21 A10 20 CE 19 O7 18 O6 17 O5 16 O4 15 O3
1.480 (37.59) Max 28 15 .580 (14.7) 1 14 .216 (5.5) Max
.100 (2.54)
.100 (2.54) Min

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